From Videologic website

PowerVR was developed jointly by VideoLogic and NEC. The system is fully scalable, allowing multiple chips to be ganged together giving a linearincrease in speed as chips are added. It can be used in a wide range of 3Dapplications and entertainment markets from games consoles, through PCs,right up to high-end arcade machines. This also allows content producers totarget a range of different platforms without redesigning their titles.PowerVR’s core 3D rendering algorithm is infinite plane (surface) based.This approach allows the system to efficiently cater for polygons, polygonmeshes, infinite planes, and convex objects. Its polygon object renderingallows the use of conventional, industry-standard APIs such as Microsoft’s®Direct3D™, and the ability to directly process infinite planes and convexobjects allows PowerVR to provide advanced features such as full shadows andsearchlights in real-time. In addition to support for industry-standardAPIs, PowerVR has its own high-level object oriented API, called PowerVRSGL, that provides full access to all the capabilities of the PowerVRhardware. * Real shadows can be cast from any object over any surface, and updated every frame * PowerVR’s equivalent 32-bit Z buffer makes solid outdoor objects a reality * Pixel perfect hidden surface removal * Anti-aliased textures using PowerVR’s mip mapping stops shimmering * Perspective-correct textures do not bend because PowerVR performs a division per pixel * Smooth shading does not change when rotated * Translucency can be applied to whole objects, polygons, or individual pixels for effects like dirty glass, fire, water, and even simulated lens flare and radiosity * True logarithmic colored fog calculated per pixelThe chipsets used in the PowerVR are the NEC ISP (Image SynthesisProcessor), TSP (Texture and Shading Processor) and MC (Memory Controller).A single chip version, the PCX1 (PC Processor), has one ISP and one TSP on asingle chip, and is designed for low cost home markets.Performance * Average polygon size: 100-1000 pixels * Low cost design - 257K mip mapped textured, smooth shaded triangles/second (one ISP or PCX1) * Arcade design - 1028K mip mapped textured, smooth shaded triangles/second (four ISPs)NEC ISP: Image Synthesis Processor * 66 MHz processor * 32 processor elements * 32-bit depth precision * On-chip hidden-surface removal (no need for Z buffer memory) * 12k parameter cache for tile caching * Expansion bus for multiple ISPs * 0 to 2 MB external parameter cache * True shadow generation * Per pixel foggingNEC TSP: Texture & Shading Processor * 66 MHz processor * Perspective correct texturing (division per pixel) * Anti-aliased texture mapping (linear Mip mapping) * 32 x 32 to 256 x 256 texture bitmap sizes * 4 to 16 MB texture memory * Texture flipping (horizontal and/or vertical) * Texture formats: o 8-bit (2,3,2) RGB o 16-bit (5,5,5) RGB o 16-bit (4,4,4,4) RGBT * Optimized architecture for low page break overhead * 4 KB internal parameter cache * 264 MB/sec peak texture memory bandwidth * Smooth shading * Smooth full shadows * Flat shading with offset highlight * 24-bit mixing of texture, lighting and shading * Exponential fogging - with programmable fog color * Accumulation buffer - allows multiple layers of translucency * Translucent textures - 16 levels per pixel * Global translucency allows objects to fade - 16 levels * 2D overlay: 4/8 bit packed double buffered * 2D scrolling * 3D data: 16/24 bit packed double buffered 1 to 4 MB frame buffer * Programmable SPG with sync master/slave (allows overlay) * 1024 x 1024 maximum resolution * 24/16 bit RGB modesNEC MC: Memory Controller * Support for 4300, 4400 and the latest MIPS CPUs * SDRAM interface at 66 MHz * System Control (SC) Bus interface at 66 MHz * Master or Slave deviceNEC PCX1: PC Processor * 66 MHz processor incorporating ISP and TSP function * 32 processing elements in ISP module * On-chip 12K ISP and 4K TSP parameter caches * Single SDRAM external interface for texture and parameter caching * PCI 2.1 interface * True shadow generation and per pixel fogging * Perspective-correct texturing and anti-aliased textures * 32 x 32 to 256 x 256 texture bitmap sizes * 1 to 4 MB texture memory * Texture formats: o 8-bit (2,3,2) RGB o 16-bit (5,5,5) RGB o 16-bit (4,4,4,4) RGBT * 264 MB/sec peak texture memory bandwidth * Smooth shading * Flat shading with offset highlights * 24-bit mixing of texture, lighting, and shading * Exponential fogging - with programmable fog color * Accumulation buffer - to allow multiple layers of translucency * Translucent textures - 16 levels per pixel * Global translucency allows objects to fade - 16 levels * 24/16 bit RGB and 16 bit dithered RGB modesSoftware * Microsoft Direct3D Support, PowerVR SGL 3D Graphics API and Library * Immediate mode and Retained mode, Display list hiearchy,Object instancing * Features include: collision detection; level-of-detail management; full shadows; and lighting